| 1. | Stress - dependent hot carrier degradation for pmosfets structure under stress mode vg
2应力模式下应力相关的热载流子退化 |
| 2. | Under hot carrier stress , device degradation is the consequence of hot carrier induced defect generation locally at drain side
在热载流子应力条件下,器件的退化主要是由于在漏极附近由热载流子产生的损伤缺陷引起的。 |
| 3. | Similar to hot carrier degradation , asymmetric on - current recovery was also observed and discussed . device degradation behaviors are compared in low vd - stress and in high vd - stress condition
在自加热退化中我们也发现了类似热载流子退化中的非对称性恢复现象,并对其退化特点和模型进行了讨论。 |
| 4. | Device degradation behaviors of typical - sized n - type metal induced lateral crystallized polycrystalline silicon thin film transistors were investigated under two kinds of dc bias stresses : hot carrier stress and self - heating stress
本文主要研究了典型尺寸的n型金属诱导横向结晶多晶硅薄膜晶体管在两种常见的直流应力偏置下的退化现象:热载流子退化和自加热退化。 |
| 5. | Second , the hot carrier induced degradation in sde structures is deeply analyzed . the experiments results have shown that the degradation of sde structures shows different characteristics . the degradation nature is studied and an explanation is given
论文的重点是研究sdemos器件的热载流子可靠性，研究发现sdemos器件的退化特性与常规器件不同，通过实验与模拟相结合的方法，指出sdemos器件退化呈现出不同特点的内在原因，并给出了sdemos器件退化特性的物理解释。 |
| 6. | It is proposed that the higher dose condition creates more hot carriers but the lower sensitivity to hot carrier effect . therefore , the optimum dose for reliability is determined from the trade - off between the above two aspects . finally , a simple model is proposed and discussed
本文还深入研究了sde区掺杂浓度对器件热载流子可靠性的影响，指出浓度的提高虽然会产生更多的热载流子，但由于其对热载流子损伤的敏感度降低，因此将存在一种折衷，最后通过一个简单的寄生电阻模型，对掺杂浓度提高后，器件对热载流子损伤敏感度降低的现象做出了很好的解释。 |
| 7. | The emphasis is about the metal line reliability , contact reliability , gate oxide integrity , and hot carrier injection in test . based on the test datum , the reliability of 1 . 0 m process on single failure mechanisms is evaluated , and all the test structures are explained
测试内容上着重介绍了金属化完整性测试、氧化层完整性测试、连接完整性测试和热载流子注入测试，根据测试数据，对1 . 0 m工艺线单一失效机理的可靠性进行了评价，对不同测试结构的作用进行了说明。 |
| 8. | It is shown that substrate current is not the good indication of hot carrier effect in sde structures and using a threshold degradation criterion to characterize device degradation is not suitable for sde structures . third , the effect of the sde implant dose on the hot carrier immunity is thoroughly studied
在此基础上，指出采用峰值衬底电流评估sde结构器件可靠性的局限性，以及在采用i - v特性测试方法研究sde结构器件的热载流子效应时，阈值电压作为退化判据所存在的问题。 |
| 9. | Based on the hydrodynamic energy transport model , the influence of variation of negative junction depth caused by concave depth on the characteristics of deep - sub - micron pmosfet has been studied . the results are explained by the interior physical mechanism and compared with that caused by the source / drain depth . research results indicate that with the increase of negative junction depth ( due to the increase of groove depth ) , the threshold voltage increases , the sub - threshold characteristics and the drain current driving capability degrade , and the hot carrier immunity becomes better in deep - sub - micron pmosfet . the short - channel - effect suppression and hot - carrier - effect immunity are better , while the degradation of drain current driving ability is smaller than those with the increase of depth of negative junction caused by source / drain junction shallow . so the variation of concave depth is of great advantage to improve the characteristics of grooved - gate mosfet
基于能量输运模型对由凹槽深度改变引起的负结深的变化对深亚微米槽栅pmosfet性能的影响进行了分析，对所得结果从器件内部物理机制上进行了讨论，最后与由漏源结深变化导致的负结深的改变对器件特性的影响进行了对比.研究结果表明随着负结深(凹槽深度)的增大，槽栅器件的阈值电压升高，亚阈斜率退化，漏极驱动能力减弱，器件短沟道效应的抑制更为有效，抗热载流子性能的提高较大，且器件的漏极驱动能力的退化要比改变结深小.因此，改变槽深加大负结深更有利于器件性能的提高 |
